%FILENAME%
fusesoc-1.12.0-1-any.pkg.tar.zst

%NAME%
fusesoc

%BASE%
fusesoc

%VERSION%
1.12.0-1

%DESC%
Package manager and build abstraction tool for FPGA/ASIC development

%CSIZE%
109267

%ISIZE%
531605

%MD5SUM%
48579a8689ddb85289aecbe75e31b2dd

%SHA256SUM%
6c039f7c39599d198c4c3c0ba89dfe7da0d38f2faa9bbfcd32cd111f227fce35

%PGPSIG%
iQIzBAABCAAdFiEE0jW0leqs33gyftiw+JPGdIFqqV0FAmA5bGwACgkQ+JPGdIFqqV3voA//e3wpTBPTh+ZIpUjVG4U/hOl8mSm9w/e45IMnfVjzTuN2pI51MddCNR3pljl7MG9rdtvh538bQJQIHginTZHGOwtNjy9ECJucTjqoHS45bWZCYmmTaM8MB5GioHhXKk6ZmDhAPgXij6mB4afYj5hFPxSORvSoiuUx/U02rqqS+wFKvr/gH7SqNbcw0HdFf8Z5OFKmx6L1d58Z47A+iMO05ib8yORHSSc239LWfMIf+rNNOOEyDQSmq6JsPZvSjYdOz6bPu/fdR7dMgdiV2Oi0Qy6RYH9EtZNdqPqk8KdoeXGGZPU9TQL5QWPv909sQjEY/lgjV4C0pZclLLTX7SgBpX2on1K0R8sIo2NIFt7ueZlml3nfNVdkOkSQpw1p08/bj7glPFKFV9Qu5j2G0TU9nK26U+MJcXTfMv7IoLWyKJUgBThuju1SZQpHaWKSnUoZdueD3eXZbRiYPeVS7bAu0lobTedgpJZoLdRpYzu2o2t+WZEcw5ixxxUovJzih/Q3byyAIe9zlErRX9jxYJbNFt7i91gvuD9kFJwn35E+bKvn8aTBPQ3A2T9jrQjTy+fAyqZbmpG06sdYTehU1GZUvjt7nSeeFMOomL8iN8Hi4Hhqshxh2j52Fx46jKo0OTrncXBmQcHBaVU7t6KFnskI4CZfmd/mbmZkUqU83dVv7jU=

%URL%
https://github.com/olofk/fusesoc

%LICENSE%
BSD

%ARCH%
any

%BUILDDATE%
1614375992

%PACKAGER%
Filipe Laíns <lains@archlinux.org>

%DEPENDS%
python
python-edalize
python-ipyxact
python-pyparsing
python-yaml
python-simplesat
git

%OPTDEPENDS%
iverilog: run simulation/testbenchs
svn: opencores provider

%MAKEDEPENDS%
python-setuptools-scm

