%FILENAME%
verilator-4.108-1-x86_64.pkg.tar.zst

%NAME%
verilator

%BASE%
verilator

%VERSION%
4.108-1

%DESC%
The fastest free Verilog HDL simulator

%CSIZE%
4579697

%ISIZE%
21286257

%MD5SUM%
8288dd9b0c9e5199af1c376c986eeb60

%SHA256SUM%
f4931d3a6b5c3d1d8bf87068aa52c18515012d70496c9fc766102af5f33b04a0

%PGPSIG%
iQIzBAABCAAdFiEEtZcfLFwQqaCMYAMPeGxj8zDXy5IFAmAUBg0ACgkQeGxj8zDXy5IRaRAAgQsNide57SwgHDfYLDWJDK6uOZVkrDeaU8u7bUK72GJ4TvkVsVJVcJQelMVJvZbfFZCniMImBxvyjBGcOwKojIga4nGcG2xBvdH/THqlhSdwVmedjZ1gcu/5eSFv+cITgfAUuq4ZNlQzQFUJQHqBI6fTf0BFP9CurESWX4ZNgriJbxhtwXGOJ3sNtVH4K59Zcel52kGoeLydDfLx94wYIeQOJNh7e095TtXQC4VosiozKxH/Gh1WQu30IDzCLjUzM8phbZLVfok4ptL9Rz/GosK8Mdh8vvg4qSHYbhBkbDe5kFctfwOItfa5zV0hJ5zz+fGpT6Nz2m6883PNadugwodtAFxBQK9EsaUU04SpXG2+ni4fn//9s9AsPBUCG08dB04fMQ97xU/dRl9j4eKdCeng/kFWJHAuh9CXLINF5V+RK9NJRyO8pbfD15M2rUHsCxIpsEISrO+QoSa+pSmnlw81PgNy+3NUR8ll2FdXtIlBQaKdyULJYilmp7pzkEtYjcupHdADlzfD+DekZ8s6TWd0pnY64UcZbx03aaqoVXf3RmGOXjBC1tQ5vVy5l0vs1BtH34Oi6/dRsNzaSwc+lkWFHN8efRxnD2/zeR6QM6RKBV1tdmYuRn/BwGUFiGGhmJes1+Pjb9jAD2n0inBGUKFgHgB1mplolvfjS4av4Gg=

%URL%
https://www.veripool.org/projects/verilator/wiki/Intro

%LICENSE%
LGPL

%ARCH%
x86_64

%BUILDDATE%
1611924917

%PACKAGER%
Felix Yan <felixonmars@archlinux.org>

%DEPENDS%
perl

%MAKEDEPENDS%
python

